Silicon semiconductor devices are typically manufactured in wafer form due to the availability of boule growth processes for silicon and other popular semiconductor devices. Nitrides however lack a suitable low cost native substrate. Even if such wafers were available polishing to an epi ready surface is problematic due to variable miscut angles, surface defects, and low etch rates. The difficulty in polishing especially high quality HVPE nitride surfaces is discussed by DenBaars in Chemical Mechanical Polishing of Gallium Nitride (2002). As such considerable efforts have gone into growing nitrides on non-native substrates such as sapphire, silicon, silicon carbide and glass. The quality of devices is always compromised when non-native substrates are used. Lattice mismatches between the non-native substrate and nitride layer induces internal stresses, limits subsequent process temperature ramp rates, and even decreases growth rates of subsequent layers. Device designs are also limited by the presence of a non-native substrate. This leads to additional processing steps such as transfer processes like laser liftoff or multiple etching steps to expose under-lying layers for interconnect and thermal performance reasons. In addition, polarization effects can play a significant role in device performance. The stresses created by the lattice mismatch between the non-native substrate and nitride layer have been shown to affect virtually every device performance parameter ranging from high current droop to indium incorporation. Lastly, the use of non-native substrates limits subsequent epitaxial growth processes due to a tendency for wafers to crack or shatter during the rapid thermal changes required for device growth. The need therefore exists for novel methods and devices which overcomes these limitations.
Thick (>5 mm) freestanding nitride wafers up to 2 inch in diameter have been grown in the prior art but are extremely expensive and typically have a large number of cracks and other defects. To obtain thin slices from this thick boule they must be mechanically sawed. The slicing process introduces defects due to misalignment to the crystal planes. In addition the polishing steps required to create an epitaxial surface introduces defects and requires several hours of polishing. The bulk nitride boule is also significantly bowed at room temperature. Cutting flat wafers from this growth causes a variable miscut across each wafer sliced from the boule. This causes the electrical or optical properties of devices grown on these nitride wafers to vary based on their location across the wafer. An example of diced wafers from boule growth can be seen in Dmitriev Pat. Appl. 20060280668. In Dmitriev AlN boules are grown greater than 5 mm thick and then diced and polished to create a wafer greater than 6 cm in diameter. Polishing defects and variable miscut angle defects are inherent to this prior art process. The need exists for a low cost freestanding substrate which does not require slicing or polishing and its inherent defects but has sufficient mechanical integrity for further processing and handling. High pressure/High temperature growth methods for GaN boules suffer from the same cutting and polishing issues as HVPE based boules but also suffer from contamination issues as well which can negatively impact the absorption or alpha coefficient of the material. In general, high alpha leads to high optical absorption losses which further illustrates the need for an economical source of thin nitride growth substrates.
In many devices the need also exists for access to both the front and back of the nitride layer. Multi junction solar cells would especially benefit from the ability to grow/deposit semiconductor layers on both sides of a thin nitride low defect veneer. Used for optical device fabrication nitrides can span a significant portion of the visible spectrum. With high doping concentrations InN has been shown to exhibit a bandgap of 0.7 eV, however to achieve this high doping concentration very pure and very low defect Gallium Nitride is required. High quality high indium composition InGaN is difficult to grow. Typically this is done with expensive and tedious processes like molecular beam epitaxy (MBE). These processes cannot be scaled up to achieve a high throughput low cost means of production. Therefore a need exists for a low cost and viable process to produce low cost high quality nitrides which do not have to be sawed and polished and have low stress and low defect densities and can accept high doping concentrations dopants (e.g. Indium).
Another very prevalent problem of growing nitride layers on thick substrate templates is stress and warping induced by the difference in thermal expansion of the two layers. As an example a typical 30 micron GaN on thick (440 μm) sapphire 2 inch diameter template will bow over 200 microns either at room temperature or at growth temperature. If the bow is present at room temperature, formation of contacts and liftoff processes exhibit low yield due to the non-flat nature of the template. If the bow is present during growth processes, non-uniform heating is typically experienced which results in variation of device characteristics (e.g. greater than 100 nm of variation in peak wavelength output has been seen for 30 micron templates on sapphire). The stresses induced due to the mismatch of thermal expansion coefficients result in limitations on doping concentrations attainable. For example GaN layers under stress during doping will accept lower concentrations of dopants (e.g. Indium).
As detailed above nitride templates exhibit significant bow either at room temperature or growth temperature which reduce yield. These template approaches are also sensitive to rapid thermal transients which limit reactor processing conditions. For example nitride films on thick foreign substrates will crack if thermal cycled at too rapid of a rate. Bulk nitride approaches besides being cost prohibitive, exhibit surface defects due to polishing and have a variable miscut across the wafer which leads to variation in the device performance across the wafer. Therefore a need exists for an improved method of growing nitride layers that are stress free, can absorb dopants, are not sensitive to cracking during fast thermal cycling, can be uniformly heated and are economical to produce.
As discussed above, conventional nitride growth substrates in all forms suffer from significant internal stresses. As such a number of processing constraints are placed on the growth reactors used to make devices on these nitride growth substrates. The nitride veneers disclosed in this filing do not have the same processing constraints as the existing nitride growth substrates listed above. As such the need exists for a growth reactors which can take advantage of the improved processing conditions offered by nitride veneers.